Concept cluster: Graphics and sound > CPU and Assembly
n
(computing, Microsoft) A set of Microsoft products and services – primarily the .NET Framework, which permits the development of software for a virtual machine in any CLI-compliant programming language.
n
Alternative form of 3DNow! [(computing) An enhancement of the MMX extension to the x86 CPU instruction set architecture, allowing for enhanced performance with 3D-graphics-heavy applications; rendered obsolescent by later versions of the SSE instruction-set extensions.]
n
(computing) An enhancement of the MMX extension to the x86 CPU instruction set architecture, allowing for enhanced performance with 3D-graphics-heavy applications; rendered obsolescent by later versions of the SSE instruction-set extensions.
n
(computing) A range of discrete addresses, all the address locations available in a particular, named, subset of a computer's (virtual or real) memory.
n
(computing) A RISC CPU instruction set architecture developed and marketed by Digital Equipment Corporation (then later by Compaq and then Hewlett-Packard) from 1992 until 2004.
n
(computer hardware) arithmetic logic unit.
n
(computing, usually attributive) The 64-bit version of the x86 instruction set architecture (as opposed to the original 16-bit x86 architecture, or to the 32-bit version of the x86 architecture, also known as IA-32, i386, or x86-32).
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(computing) The length of time that a central processing unit takes to process instructions for a particular program or task.
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(computer languages) A set of rules for encoding documents in machine-readable form.
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(very strictly) The original version of this file system, storing both the number of (real or virtual) disk sectors and the number of sector clusters in a volume as 16-bit integers.
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(computing) The version of the FAT series of file systems which uses a 32-bit file allocation table.
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(computer hardware) A microprocessor that performs floating-point arithmetic. In older models of computer the FPU was not integrated into the central processing unit, but rather as a coprocessor if included at all.
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(computing) The first 64 kilobytes of the area of memory beyond 1 MB in an IBM-compatible PC.
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(computing) Short for instruction cache.
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The 32-bit version of the x86 instruction set architecture, first used on this model of processor (earlier x86 processors used the 16-bit version of the x86 architecture).
n
(computing, usually attributive) The 32-bit version of the x86 instruction set architecture (as opposed to the original 16-bit x86 architecture or its later 64-bit extension).
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(computing) An EPIC 64-bit instruction set architecture designed to allow relatively simple, cheap CPUs to execute many 64-bit instructions simultaneously and with potentially very high performance; developed by Intel in the late 1990s with the intent of replacing the older x86 architecture, but was delayed and proved uncompetitive with x86 (especially x86-64), seeing use only in Intel's own Itanium line of high-end CPUs.
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(computing) A branch of information science and of computer science that focuses on the study of information processing, particularly with respect to systems integration and human interactions with machine and data.
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(computing) A single operation of a processor defined by an instruction set architecture.
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(computing) The steps that a central processing unit undertakes in order to process a single instruction, consisting of fetching, decoding, and executing the instruction in question and updating the program counter.
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(computing) An operational mode of x86-64 computers which enables 64-bit addressing, running older 32-bit code in compatibility mode and foregoing support for real-mode applications entirely.
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(programming) A comparatively human-friendly abbreviation of complex input to a computer program.
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(computing) An assembler that supports user-defined macros.
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(computing) A macro.
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(computing) A fundamental block of computer memory
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(databases, programming) Synonym of MVCC (multigenerational concurrency control)
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(computing) The architecture of the data processing parts of a microcomputer.
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(computing) The collective microprograms in a CPU, used to run machine instructions.
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(computing) A hardware instruction in the CPU of a microprocessor; a software instruction in a microprogram
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(computing) A computer-human interaction in which either the computer or the human can take initiative and decide what to do next.
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A multiplexer.
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(software architecture) Any of various software design approaches involving a model and a view, such as MVC, MVP, or MVVM.
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(computing) A standard file format, based on XML, for office applications.
adj
(computing) Of computer software or computing methods and concepts: implemented such that they can operate on any of various computer platforms.
n
(computing) A RISC load/store instruction set architecture developed by the OpenPOWER Foundation.
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(computing) An operational mode of x86-compatible CPUs, in which software can use features such as virtual memory, paging, and safe multitasking.
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(computing) A small unit of very fast memory that is directly accessible to the central processing unit, and is mostly used to store inputs, outputs, or intermediate results of computations.
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(computing) A processor's instruction set.
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(computing) Acronym of read-eval-print loop. [(programming) An interactive programming language interpreter.]
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(software architecture) A way of providing interoperability between computer systems on the Internet based on textual representations of Web resources and a predefined set of stateless operations.
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(computing) A network standard invented by IBM and later defined by the 802.5 subcommittee of the IEEE which provides for a network with a star ring topology, and which operates by passing a token frame around the logical ring.
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Abbreviation of microcontroller. [(computing, electronics) A microcomputer on a single chip, used to control some device such as an automobile engine or a toy.]
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(computing theory) A particular type of theoretical computer, with infinitely many memory cells, called registers, and formal rules to determine the machine's behavior based on their contents.
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(computing) A computer architecture that uses the same buses to access both program instructions and data to be operated on.
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(computing) Contraction of x86-64. [(computing) A superset of the x86 instruction set architecture, providing additional support for 64-bit addressing while remaining mostly backward compatible with older applications.]
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Specifically, the 32-bit version of the x86 instruction set architecture.
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Alternative spelling of x86-64 [(computing) A superset of the x86 instruction set architecture, providing additional support for 64-bit addressing while remaining mostly backward compatible with older applications.]
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(computing) The original 16-bit-only version of the x86 instruction set architecture.
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(computing) The 32-bit version of the x86 instruction set architecture.
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(computing) A superset of the x86 instruction set architecture, providing additional support for 64-bit addressing while remaining mostly backward compatible with older applications.
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(computing) An extension to the x86 CPU instruction set architecture, providing direct hardware support for advanced floating-point arithmetic operations (rather than requiring them to be emulated in software).

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